A Patient Disciple of RISC-V, SiFive Starts Selling Cores

Last year, SiFive went fishing for engineers willing to test out chips based on the RISC-V instruction set, releasing a basic core called Rocket that anyone could download and modify. But now the company, whose founders invented RISC-V, is using richer bait for more ambitious customers.

Last week, SiFive started selling two embedded cores under the brand Coreplex, with applications ranging from wearables to servers. The company is aiming to lower the bar for engineers trained on Intel or ARM instruction sets to take RISC-V for a spin, when few companies appear to be turned off by the inflexibility or licensing fees of rival technology.

Licensing the cores takes little more than signing an online contract and making a one-time payment, which will cost less than a million dollars. The company is also making the register transfer level – more commonly known as the RTL – available immediately, so that chip designers can simulate particular designs.

The announcement is a mile marker for the year-old business. SiFive is stamping an early claim on the RISC-V instruction set, which provide starting instructions for creating a chip and which promises to reduce the millions of dollars and years of development required to make custom chips for markets like the Internet of Things and cloud computing.

SiFive is using the new instruction set to provide chips ahead of time, filling in the blanks with its own custom technology or working with customers on unique designs. Its business model is similar to how Red Hat Software turned its expertise with the free Linux operating system into a billion-dollar business.

“Since the company was founded, we have actually had lots of requests from customers,” said Jack Kang, SiFive’s vice president of product and business development, in an interview last week. “They said, it’s nice to have open-source cores, but we want a commercial license that a company is behind and is well-supported.”

The Coreplex intellectual property includes two designs. The E31 core is a 32-bit processor that can replace the ARM Cortex M3 inside sensors and wearables. The E51 core is a 64-bit embedded processor that is designed to function as a controller in large chips that share silicon with power management, signal processing, and other circuitry.

SiFive is selling the cores to make it easier for the RISC-V community to continue growing. The start-up is not charging royalty fees, meaning that it gets nothing more than the one-time payment of $295,000 for the E31 and $595,000 for the E51. That holds true even if a company using its blueprints builds a hugely successful product.

"The more RISC-V things in the world, the better things are for us," Kang said. "We want to give you RISC-V in any way possible: you can buy from us, you can license from us, or you can work with us to build a custom chip."

Its sales strategy aims to eliminates many of the usual snags for licensing cores: engineers will not have to contact a salesperson or sign a non-disclosure agreement to view datasheets and specifications. If companies want to purchase the cores, they only have to sign a seven-page contract. There are no contract negotiations.

“In royalty-based models, companies have to know exactly what you are making and how many there will be,” according to Kang. “But you can buy enterprise software online directly without talking to anyone. So we asked: why not bring that to hardware?”

RISC-V lets companies modify the basic instructions inside their chips, using a modular design that allows engineers to add custom extensions. That contrasts with Intel and ARM, both of which tightly control how its instruction sets evolve. Using RISC-V, companies control more of the chip's design, cutting down on money and time required for customization.

That has clearly intrigued companies looking into custom chips, especially ones trying to squeeze performance out of their data centers. The RISC-V Foundation, which maintains the instruction set, includes members like Google, Microsoft, and Oracle, as well as IBM. Their engineers are frequent attendees at RISC-V meetings.

But the instruction set has also won over large semiconductor companies. After evaluating ARM, MIPS, and other embedded architectures, Nvidia started using RISC-V in the controllers for its graphics chips. Microsemi, one of SiFive's first customers, is already using Coreplex technology in its Igloo and other FPGA chips. 

Investors are also betting on open hardware. SiFive, whose founders – Krste Asanovic, Yunsup Lee and Andrew Waterman – are also active with the RISC-V specification, announced Monday that it had raised $8.5 million from Spark Capital and other investors. The start-up previously raised $5 million in its first funding round.

In November, SiFive released its Freedom development boards, which let customers tinker with the RTL inside the chip. The start-up said on Monday that it had already sold over a thousand boards, which it funded through crowd-sourcing. 

“It’s still the early days for RISC-V, so lots of companies initially decided to try it without actually understanding what ‘free and open’ means," said Kang. "The biggest surprise is that it isn’t exactly what they were initially looking for.”

“But I think the sign of momentum is that companies say that they want more from us," said Kang. "We’ve really been surprised by how quickly RISC-V has grown.”

from Electronic Design - Engineering Essentials Curated By Experts http://bit.ly/2pt5JPP